Siddharth Devarajan

Learn More
The design of on-chip error correction systems for multilevel code-storage NOR flash and data-storage NAND flash memories is concerned. The concept of trellis coded modulation (TCM) has been used to design on-chip error correction system for NOR flash. This is motivated by the non-trivial modulation process in multilevel memory storage and the effectiveness(More)
This paper presents a multilevel (ML) Flash memory on-chip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivial modulation process in ML memory storage and the effectiveness of TCM on integrating coding with modulation to provide better performance. Using code storage 2bits/cell Flash(More)
Acknowledgement This work would not have been possible without the inestimable guidance of Kristin Bennett, my mentor and advisor. I would like to thank her, first and foremost, for her constant support and encouragement. I like to thank Jong-Shi Pang, with whom I collaborated extensively on these projects, for his guidance and support. I would also like to(More)
— A three-dimensional (3D) IC technology platform for high-performance, heterogeneous integration of silicon ICs for mm-wave smart antenna transceivers is presented. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer(More)
  • 1