Siang-Den Deng

We don’t have enough information about this author to calculate their statistics. If you think this is an error let us know.
Learn More
–The performance of single-issue RISC cores can be improved significantly with multi-issue architectures (i.e. superscalar or VLIW) by activating the parallel functional units concurrently. However, they suffer high complexity or huge code sizes. In this paper, we borrow some ideas from old vector machines and propose a novel DSP architecture with very(More)
  • 1