Shuisheng Wei

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Emerging reconfigurable hardware, SOPC (System On Programmable Chip), requires a RTOS to reuse the abundant source code. This paper presents a RTOS with the ability to co-schedule HW/SW, and discusses its architecture in detail for SOPC. The paper addresses an efficient run-time partitioning algorithm for block partitioning of FPGA. At last, a case study(More)
This paper presents an automation design-aided system for System-on-Programmable-Chip (SOPC). Platform-based design for SOPC issues become critical as implementation technology evolves towards complex integrated circuits and the time-to-market pressure continues relentlessly. Hence, new methodologies that emphasize Re-use and re-configurable are essential(More)
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