Shoichiro Yamada

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This paper deals with the problem of automated placement of electronic components in a circuit layout by using a graph-space approach. In this approach, the relationships of connections among modules in a given electronic circuit are represented by a hypergraph. Then by using a graph-space approach, the vertices (representing the modules) are mapped into(More)
This paper proposes a fast heuristic method for the scheduling problem ,minimizing hardware costs of functional units, registers, and busses on the basis of an integer linear programming (ILP) model. In our method, the total computation time can be much reduced compared to the general ILP method, since we re -duce the number of the integer variables which(More)
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