Shivashankar

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This paper presents a source based power-aware reactive routing protocol for Mobile Ad hoc Networks (MANETs). It considers Quality of Service (QoS) parameters namely delay, throughput, bandwidth and cost of each link. Recent advances in MANETs have led to many new routing protocols specifically designed for mobile devices. Almost all of these routing(More)
In this paper, we present an extensive ns-2.33 simulation based performance comparison of four widely known stability-oriented on-demand Mobile Adhoc Network (MANET) routing protocols. Our simulations show that modified Power DSR (PDSR) routes are more stable than existing DSR routes, which are more stable than DSDV and AODV routes. This also results in an(More)
The Vehicular Ad Hoc Networks (VANET), which are essentially the subset of Mobile Ad Hoc Networks (MANET) have been focused in the recent years mainly for the research and development of the Intelligent Transport Systems having the ability for both self-management and also self-organization, making them reliable as a highly mobile network system Also, the(More)
Convergecast, the process of data collection from set of sensor nodes and forwards to the sink node over a tree based topology is a fundamental traffic pattern in Wireless Sensor Networks(WSN). Time Division Multiple Acess(TDMA) protocol is considered for scheduling, where time is divided into slots. The main aim of this paper is to reduce the number of(More)
Vehicular Ad hoc Networks (VANETs) is an infrastructure less network with dynamic nodes along with Road Side Units (RSU). Due to high vehicle density, randomness, scalability, mobility, data dissemination is a troublesome task. So, a realistic approach has been carried out in avoiding fatal accidents and bottleneck traffic. In upcoming technology, it can(More)
In video compression, one needs a highly efficient motion estimation algorithm in terms of processing speed. A novel block matching algorithm for motion estimation in a video frame sequence well suited for a high performance VLSI implementation is presented in this project. The algorithm is up to 40% faster when compared to one of the fastest existing(More)