Shiuh-Wuu Lee

Learn More
In this paper, the major physical effects caused by gate oxide traps in MOSFETs have been integrated for the first time by a proposed unified approach in realistic manners based on industry-standard EDA tools, aiming at practical trap-aware device/circuit co-design. The recently-found AC or transient effects of traps and the interplays with manufacturing(More)
Large-width and short-length MOS transistors with multi-finger layouts are necessary for the mixed-signal and RF IC designs to achieve optimum gain and noise performances. As the total width (i.e., the product of the finger width and the number of fingers Nfg) increases, the parasitic source and drain resistances due to the contact and diffusion regions(More)
  • 1