Shingo Mandai

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We present a single-photon avalanche diode (SPAD) with a wide spectral range fabricated in an advanced 180 nm CMOS process. The realized SPAD achieves 20 % photon detection probability (PDP) for wavelengths ranging from 440 nm to 820 nm at an excess bias of 4 V, with 30 % PDP at wavelengths from 520 nm to 720 nm. Dark count rates (DCR) are at most 5 kHz,(More)
This paper proposes a 128-channel column-parallel two-stage time-to-digital converter (TDC) utilizing a time difference amplifier (TDA) and shows measurement results with a 0.35um CMOS process. The 1st stage operates as a coarse TDC, the time residue which is not converted in the 1st stage is amplified by a TDA, then converted by the 2nd stage TDC. As the(More)
This paper presents a digital silicon photomultiplier based on column-parallel time-to-digital converter (TDC), so as to improve the time resolution of single-photon detection. By reducing the number of pixels per TDC, the pixel-to-pixel skew is reduced. We achieved 264 ps FWHM time resolution of single-photon detection using a 48-fold column-parallel TDC(More)
We introduce a 4<sup>2</sup>x cascaded time difference amplifier (TDA) using differencial logic delay cells with 0.18&mu;m CMOS process. By employing differential logic cells for the delay chain instead of CMOS logic cells, our TDA has stable time difference gain (TD gain) and fine time resolution. Measurement results show that our TDA achieves less than(More)
This paper proposes a 128-channel column-parallel two-stage time-to-digital converter (TDC) utilizing a time difference amplifier (TDA) and shows measurement results obtained from an implementation in a 0.35m CMOS process. The first stage operates as a coarse TDC, the time residue is amplified by a TDA, then converted by the second-stage TDC. As the gain of(More)
These days, 3-D information technology is being developed rapidly and has been applied to various fields. Moreover, ultra-fast 3-D range-finding makes way for the possibilities of additional applications such as drop tests, observation of a high-speed moving target, and automated controls in robot vision. While 3-D range-finding image sensors using(More)
We have designed a 8bit two stage time-to-digital converter(TDC) using a time difference amplifier in 0.18um CMOS process. The time resolution is 1.89ps, and DNL of 0.9 and INL of 1.0 are achieved in simulation. To amplify the time residue of the first stage, the 16x cascaded time difference amplifier(TDA) using differential logic delay cells is employed.(More)