Shijian Zhang

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Fault model is the basis of research on fault-tolerant routing algorithm for Network on Chip (NoC). Since the former fine-grained fault model could not distinguish link faults from channel faults effectively, a much more fine-grained fault model is put forward, and a new fault-tolerant routing algorithm named VFFRA-BR (very fine-grained fault-tolerant(More)
With the development of semiconductor technology, microprocessors become more and more susceptible to transient faults. Some proposed schemes support redundant execution of a program in a superscalar processor for fault tolerance. However, they require a huge queue to accommodate interim states, which enlarge the hardware cost significantly. This paper(More)
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