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Embedded memory diagnostics is normally done by the built-in self-diagnosis (BISD) hardware, which collects and sends the diagnostic data to the external tester. The cost of the diagnosis process highly depends on the data volume sent between the chip under test and the tester, since the transmission time and the tester capture memory are major cost(More)
Accurate peak power measurement requires detailed switching and delay information for each signal over the entire simulation. Performing a full signal dump and power calculation for a long simulation run usually spends a large amount of time and disk space. In this paper, we propose an Essential-signal-based methodology which only performs power analysis(More)
Traditional failure analysis (FA) process proceeds by investigating the tester results of several suspected silicon signals, and then applying CAD tools to navigate and compare pre-silicon design behaviors. However, existing CAD tools usually lack of design visibility due to the imperfect link between test and design environments. In this paper, we(More)
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