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- C.-J. Richard Shi, Sheldon X.-D. Tan
- 1997 Proceedings of IEEE International Conference…
- 1997

Symbolic analog-circuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the symbolic determinant of a circuit matrix by a graph---called… (More)

- Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, Yici Cai, Xianlong Hong
- Proceedings. 42nd Design Automation Conference…
- 2005

This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today's VLSI physical design. The new method is based on a sensitivity-based conjugate gradient (CG) approach. But it adopts several new techniques, which significantly improve the… (More)

- Xin Huang, Tan Yu, Valeriy Sukharev, Sheldon X.-D. Tan
- 2014 51st ACM/EDAC/IEEE Design Automation…
- 2014

This paper presents a novel approach and techniques for physics-based electromigration (EM) assessment in power delivery networks of VLSI systems. An increase in the voltage drop above the threshold level, caused by EM-induced increase in resistances of the individual interconnect segments, is considered as a failure criterion. It replaces a currently… (More)

This paper presents a new method for determining the widths of the power and ground routes in integrated circuits so that the area required by the routes is minimized subject to the reliability constraints. The basic idea is to transform the resulting constrained nonlinear programming problem into a sequence of linear programs. Theoretically, we show that… (More)

- Wei Wu, Lingling Jin, Jun Yang, Pu Liu, Sheldon X.-D. Tan
- 2006 43rd ACM/IEEE Design Automation Conference
- 2006

We present a new method for mathematically estimating the active unit power of functional units in modern microprocessors such as the Pentium 4 family. Our method leverages the phasic behavior in power consumption of programs, and captures as many power phases as possible to form a linear system of equations such that the functional unit power can be… (More)

- Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan
- ASP-DAC 2004: Asia and South Pacific Design…
- 2004

In this paper, we present an efficient method to budget on-chip decoupling capacitors (decaps) to optimize power delivery networks in an area efficient way. Our algorithm is based on an efficient gradient-based non-linear programming method for searching the solution. Our contributions are an efficient gradient computation method (time-domain merged adjoint… (More)

- C.-J. Richard Shi, Sheldon X.-D. Tan
- IEEE Trans. on CAD of Integrated Circuits and…
- 2001

A graph-based approach is presented for the generation of exact symbolic network functions in the form of rational polynomials of the complex frequency variable for analog integrated circuits. The approach employs determinant decision diagrams (DDDs) to represent the determinant of a circuit matrix and its cofactors. A notion of multiroot DDDs is… (More)

- Sheldon X.-D. Tan, C.-J. Richard Shi
- DAC
- 2001

This paper presents an efficient algorithm for optimizing the area of power or ground networks in integrated circuits subject to the reliability constraints. Instead of solving the original power/ground networks extracted from circuit layouts as previous methods did, the new method first builds the equivalent models for many series resistors in the original… (More)

- Jin Shi, Yici Cai, +4 authors Xiaoyi Wang
- 2009 46th ACM/IEEE Design Automation Conference
- 2009

In this paper, we propose a novel simulation algorithm for large scale structured power grid networks. The new method formulates the traditional linear system as a special two-dimension Poisson equation and solves it using an analytical expressions based on FFT technique. The computation complexity of the new algorithm is <i>O</i>(<i>NlgN</i>), which is… (More)

- Carlos Sánchez-López, Francisco V. Fernández, Esteban Tlelo-Cuautle, Sheldon X.-D. Tan
- IEEE Trans. on Circuits and Systems
- 2011

This paper proposes new pathological element-based active device models which can be used in analysis tasks of linear(ized) analog circuits. Nullators and norators along with the Voltage Mirror-Current Mirror (VM-CM) pair (collectively known as pathological elements) are used to model the behavior of active devices in voltage-, currentand mixed-mode, also… (More)