Sheldon Weng

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A fully on-die, digitally controlled, 500MHz switching, 250mA rated output buck Voltage Regulator (VR) implemented in 22nm Tri-Gate CMOS is presented. The silicon measured a peak efficiency of 68% and consumed an area of 0.6mm 2 (without output decoupling) with a power density of about 410 mW/mm 2 . The paper also demonstrates a controller bandwidth of(More)
Monolithic integration of Voltage Regulators (VR) is challenging given the inherent lack of scalability of inductor. Circuit techniques to reduce inductor size are attractive to increase power density and scalability. This paper presents a 70~72% efficient, 500MHz digitally controlled 3-level Buck VR with a fully on-die spiral inductor implemented on 22nm(More)
Integrated buck VR designs with different types of power inductor integration technologies have been reported [1-3]. In [1], planar lateral coupled power inductors with non-planar magnetic cores for higher inductance, quality factor and current density, are integrated on a separate silicon interposer die which is then wirebonded to the VR die on a common(More)
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