Shashidhar Mysore

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For many mission-critical tasks, tight guarantees on the flow of information are desirable, for example, when handling important cryptographic keys or sensitive financial data. We present a novel architecture capable of tracking all information flow within the machine, including all explicit data transfers and all implicit flows (those subtly devious flows(More)
Dynamically tracking the flow of data within a microprocessor creates many new opportunities to detect and track malicious or erroneous behavior, but these schemes all rely on the ability to associate tags with all of virtual or physical memory. If one wishes to store large 32-bit tags, multiple tags per data element, or tags at the granularity of bytes(More)
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexity of modern systems, software developers are increasingly dependent on specialized development tools such as security profilers, memory leak identifiers, data flight recorders, and(More)
It is not uncommon for modern systems to be composed of a variety of interacting services, running across multiple machines in such a way that most developers do not really understand the whole system. As abstraction is layered atop abstraction, developers gain the ability to compose systems of extraordinary complexity with relative ease. However, many(More)
Modern computer systems are called on to deal with billions of events every second, whether they are instructions executed, memory locations accessed, or packets forwarded. This presents a serious challenge to those who seek to quantify, analyze, or optimize such systems, because important trends and behaviors may easily be lost in a sea of data. We present(More)
Tools such as multi-threaded data race detectors, memory bounds checkers, dynamic type analyzers, data flight recorders, and various performance profilers are becoming increasingly vital aids to software developers. Rather than performing all the instrumentation and analysis on the main processor, we exploit the fact that increasingly high-throughput board(More)
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the foundation for these research is the hardwarelevel design which determines the boundaries for achievable utility and performance. Architecture design and evaluation, however,(More)
We study surface-enhanced Raman scattering (SERS) in fully dielectric periodic structures supporting Bloch surface waves. We demonstrate a lower bound for the SERS enhancement of 50 when the optical pump is resonantly coupled to the Bloch surface wave supported by the structure. A corresponding photoluminescence experiment shows an emission enhancement of(More)
......Systems responsible for controlling aircraft, protecting master secret keys for a bank, or regulating access to extremely sensitive commercial or military information all demand an assurance level far beyond the norm. These strict demands for highassurance systems stem directly from the cost of failure. For example, Boeing plans to use a single(More)