Shanzhen Chen

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Current flat-id based routing schemes promise support for mobility and scalability. However, providing efficient routing with minimal overheads for mobility is still a challenge. In this paper we provide a solution to these problems by introducing Virtual Id Routing (VIR). VIR meets these basic requirements of future id-based routing schemes: namely, i)(More)
Caching, multithreading and the combination of them are the major latency hiding techniques adopted in network processors (NPs). Although they achieve great success in general purpose processors (GPPs), none of them have been well studied under the new context of packet processing. In this paper, we simulate the processing procedure of a four-PE (processing(More)
Packet arriving patterns have great impact on the design and evaluation of network equipments. In this paper, we present an analysis of four traces collected by NLANR, uncovering the characteristics of their packet arrival processes. Our contributions are two-fold. First, the analysis results show that both the sequences of successive small and large(More)
OBJECTIVE We studied the serological response between the special regions on the Torque teno sus virus 2 (TTSuV2) ORF1 coded protein and the porcine sera from conventional pigs. METHODS Based on a Chinese TTSuV2 strain from Guangdong province, two overlapped virus proteins were expressed from Escherichia coli. Then, purified recombinant TTSuV2 ORF1a and(More)
Network processor (NP) is a new breed of packet forwarding engine that is designed to meet the simultaneous demands of high speed and great flexibility of today's network equipments. Cache mechanism has attracted more and more attentions in the field of NP design because of its big success in terms of latency hiding. In this paper, we evaluate the(More)
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