Shan-Chun Yang

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An ultra-fast temporary bonding and release process was investigated for the improvement of 3D integration. The bonding scheme composes of two different kinds of polymer for release layer and adhesive layer. The submicron release layer is a positive photoresist with the characteristic of high UV absorption induced into the de-bonding procedure within 20 s.(More)
A novel amorphous silicon temporary bonding and corresponding laser assisted de-bonding technology are investigated for the improvement of 3D integration. Excellent bonding results with real device wafer with α-IGZO thin-film transistor are shown at the bonding temperature of 210°C, as well as outstanding performances for bonding strength,(More)
A submicron photolysis polymer temporary bonding with ultra-fast laser de-bonding process of less than 20 s has been demonstrated where both photolysis polymer and polyimide are served as release layer and adhesive layer, respectively. In addition, the bonded structure provides high chemical resistance and mechanical strength for handling process. By(More)
A reliable temporary bonding scheme with both inorganic amorphous silicon release layer and HD-3007 polyimide based on high 355-nm-wavelength laser absorption coefficient in release layer is proposed and investigated. Effects of laser absorption coefficient and laser ablation path are also studied to develop a high throughput laser ablation process. The(More)
A new temporary bonding technology with an ultrafast laser-release process of less than 20 s is presented, where a 300-nm-thick photolysis polymer and polyimide are served as the release layer and adhesive layer, respectively. The submicrometer-thick polymer has the feature of high absorption of a 355-nm laser in contrast to polyimide during debonding(More)
The tolerance of device morphology in wafer-level bonding through polymer-coated layer was investigated for the application of 3D integration. Several different pillar heights were fabricated on wafers to simulate the case of bonding with real devices on wafers. Overall, the wafer morphology with polymer-coated layer above devices less than 2 μm can(More)
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