Shahid Masud

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The paper aims at selecting an efficient variable block size mode in H.264 video coding standard for better compression performance. This standard allows video frames to be partitioned into variable block sizes such that blocks containing highly detailed motion are represented using small block sizes and the rest using large block sizes. New techniques for(More)
The inclusion of the Discrete Wavelet Transform in the JPEG-2000 standard has added impetus to the research of hardware architectures for the two-dimensional wavelet transform. In this paper, a VLSI architecture for performing the symmetrically extended two-dimensional transform is presented. This architecture conforms to the JPEG-2000 standard and is(More)
This paper presents the design and FPGA implementation of a 2nd order all-digital Adaptive Delta Sigma (¿∑) modulator with one bit quantization. It has a modulator stage and an adaptation stage. The adaptation stage produces a feedback signal that tracks the input signal and is subtracted from it. This difference signal is in a controlled and(More)
This paper presents a modified structure based on cascaded integrator comb (CIC) filters and polynomial interpolation to perform arbitrary sample rate alterations. Incorporating CIC compensation filter within the polynomial interpolator has obviated programmable filter typically used in the process. It has also been shown that a maximum passband ripple of(More)