Seth Warn

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The paper presents the new Hardware Thread Interface (HWTI), a meaningful and semantic rich target for a high level language to hardware descriptive language translator. The HWTI provides a hardware thread with the same hthread system calls available to software threads, a fast global distributed memory, support for pointers, a generalized function call(More)
Given multiple images of the same scene, image registration is the process of determining the correct transformation to bring the images into a common coordinate system—i.e., how the images fit together. Feature-based registration applies a transformation function to the input images before performing the correlation step. The result of that transformation,(More)
Thanks to advancements in fabrication techniques, it will soon be possible to place 10's if not 100's of cores on a single hybrid CPU/FPGA reconfigurable chip. This has lead to a new field of study, namely Multi-Core Systems on a Programmable Chip (MCSoPC). The problems being studied with MCSoPC are not unlike the problems studied 20 years ago when multiple(More)
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