Sergei Sawitzki

Learn More
Viterbi algorithm is widely used as a decoding technique for convolutional codes as well as a bit detection method in storage devices. The design space for VLSI implementation of Viterbi decoders is huge, involving choices of throughput, latency, area, and power. Even for a fixed set of parameters like constraint length, encoder polynomials and trace-back(More)
Conventional approaches to increase the performance of microprocessors often do not provide the performance boost one has hoped for due to diminishing returns. We propose the extension of a conventional hardwired microprocessor with a reconngurable logic array, integrating both conventional and reconngurable logic on the same die. Simulations have shown(More)
Turbo decoding offers outstanding error correcting capabilities, that will be used in wireless applications like the Universal Mobile Telecom Standard[4] (UMTS). However, the algorithm is very computational intensive, and therefore an implementation on a general purpose programmable DSP results in a power consumption which reduces the applicability of turbo(More)
The current trend in the consumer devices and communication service provider market is the integration of different communication standards within a single device (e.g. GSM phone with Bluetooth, WLAN and infrared interface) requiring tight integration of mobile broadcast, networking and cellular technologies within one product. Channel decoder is(More)
The design of reconngurable systems is a hard task due to a huge amount of optimization trade-oos and constraints. Deeciencies at the higher level of conceptual decisions may result in critical bottlenecks of the system implementation. This paper explores the design space and performance evaluation criteria of reconngurable systems and introduces a concept(More)