Sergei Devadze

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In this paper, a new very fast fault simulation method to handle the X-fault model is proposed. The method is based on a two-phase procedure. In the first phase, a parallel exact critical path fault tracing is used to determine all the detected stuck-at faults in the circuit, and in the second phase a postprocess is launched which will determine the(More)
In this paper, a new hierarchical multi-level technique for malicious fault list generation for evaluating the fault tolerance is presented. For the description of the system three levels are exploited: behavioral, functional signal path and structural gate-network levels, whereas at each level the model of decision diagrams and uniform fault analysis(More)
A new improved method for calculation of fault coverage with parallel fault backtracing in combinational circuits is proposed. The method is based on structurally synthesized BDDs (SSBDD) which represent gate-level circuits at higher, macro level where macros represent subnetworks of gates. A topological analysis is carried out to generate an efficient(More)