Seongjun Park

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Despite several years of research into graphene electronics, sufficient on/off current ratio I(on)/I(off) in graphene transistors with conventional device structures has been impossible to obtain. We report on a three-terminal active device, a graphene variable-barrier "barristor" (GB), in which the key is an atomically sharp interface between graphene and(More)
Due to the limited regenerative ability of neural tissue, a diverse set of biochemical and biophysical cues for increasing nerve growth has been investigated, including neurotrophic factors, topography, and electrical stimulation. In this report, we explore optogenetic control of neurite growth as a cell-specific alternative to electrical stimulation. By(More)
Synthetic neural scaffolds hold promise to eventually replace nerve autografts for tissue repair following peripheral nerve injury. Despite substantial evidence for the influence of scaffold geometry and dimensions on the rate of axonal growth, systematic evaluation of these parameters remains a challenge due to limitations in materials processing. We have(More)
Optogenetic interrogation of neural pathways relies on delivery of light-sensitive opsins into tissue and subsequent optical illumination and electrical recording from the regions of interest. Despite the recent development of multifunctional neural probes, integration of these modalities in a single biocompatible platform remains a challenge. We developed(More)
The downscaling of the capacitance equivalent oxide thickness (CET) of a gate dielectric film with a high dielectric constant, such as atomic layer deposited (ALD) HfO2, is a fundamental challenge in achieving high-performance graphene-based transistors with a low gate leakage current. Here, we assess the application of various surface modification methods(More)
Concepts of non-volatile memory to replace conventional flash memory have suffered from low material reliability and high off-state current, and the use of a thick, rigid blocking oxide layer in flash memory further restricts vertical scale-up. Here, we report a two-terminal floating gate memory, tunnelling random access memory fabricated by a monolayer(More)
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