Satoshi Matsushita

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We have developed a prototype 256-slice CT-scanner for four-dimensional (4D) imaging that employs continuous rotations of a cone-beam. Since a cone-beam scan along a circular orbit does not collect a complete set of data to make an exact reconstruction of a volume [three-dimensional (3D) image], it might cause disadvantages or artifacts. To examine effects(More)
The objective of this study is the development of a computer simulation model for pedestrian movement in architectural and urban space. The characteristic of the model is the ability to visualize the movement of each pedestrian in a plan as an animation. So architects and designers can easily find and understand the problems in their design projects. In(More)
We propose a speculative multi-threading processor architecture called Pinot. Pinot exploits parallelism over a wide range of granularities without modifying program sources. Since exploitation of fine-grain parallelism suffers from limits of parallelism and overhead incurred by parallelization, it is better to extract coarse-grain parallelism. Coarse-grain(More)
Linearizability is the strongest form of consistency for concurrent systems, but most large-scale storage systems settle for weaker forms of consistency. RIFL provides a general-purpose mechanism for converting at-least-once RPC semantics to exactly-once semantics, thereby making it easy to turn non-linearizable operations into linearizable ones. RIFL is(More)
What will information terminals look like in the 21st century? We believe they will require three important features: mobility , intelligence, and diversity. With the Inter-net, a large number of our daily activities will take place on information terminals. Mobility increases their convenience; for instance, wherever we are, we bring global currency with(More)
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue window beyond ordinal instruction level parallel (ILP) processors like superscalar or VLIW. With the architecture, we estimate 3.0 times speedup against single processing elements(More)
We report our operational experience of improving the energy efficiency of the power supply and cooling facilities of the K computer. By optimizing the number of active air handlers, the blowout temperature and the number of fans, the power consumption of the air handlers was reduced by approximately 40 %. We next considered improvements to the energy(More)
We induce dramatic changes in the structure of conducting polymer nanofibers by carbonization at 800 °C and compare charge transport properties between carbonized and pristine nanofibers. Despite the profound structural differences, both types of systems display power law dependence of current with voltage and temperature, and all measurements can be scaled(More)