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For low-noise complementary metal-oxide-semiconductor (CMOS) image sensors, the reduction of pixel source follower noises is becoming very important. Column-parallel high-gain readout circuits are useful for low-noise CMOS image sensors. This paper presents column-parallel high-gain signal readout circuits, correlated multiple sampling (CMS) circuits and(More)
Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the author. Abstract Logarithmic CMOS image(More)
Logarithmic cameras have the wide dynamic range required to image natural scenes and encode the important contrast information within the scene. However, the images from these cameras are severely degraded by fixed pattern noise. Previous attempts to improve the quality of images from these cameras by removing additive fixed pattern noise have lead to(More)
Noise reduction effects of column-parallel correlated multiple-sampling (CMS) for CMOS image sensors are investigated. In the CMS, the gain of the noise cancelling can be flexibly changed by the sampling number. It has a similar effect to that of amplified CDS for thermal noise but is more effective for 1/f and random telegraph signal (RTS) noises. The(More)
  • Jongho Park, Satoshi Aoyama, Takashi Watanabe, Tomohiko Kosugi, Zheng Liu, Tomoyuki Akahori +6 others
  • 2011
Abatract This paper presents a high speed 1.3M pixel 2000fps CIS operating with low power consumption less than 0.99W. To achieve high speed column signal processing, 2-stage hybrid cyclic ADCs is adopted. The 5.6m-square global shutter active pixel has high sensitivity of 5 V/lx·s with low noise performance of 7e-rms.
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