Sanna Määttä

  • Citations Per Year
Learn More
This paper proposes a technique that mixes simulation and an analytical method to evaluate the characteristics of Networks-on-Chips (NoCs). The advantage of this technique is to reduce the simulation time by reducing the complexity of the NoC model while still obtaining accurate results for latency and throughput. The basis of this technique is: (<i>i</i>)(More)
Due to the increasing design size, complexity, and heterogeneity of todaypsilas embedded systems, designers need novel design methods in order to validate application-specific functionality together with different platform implementation alternatives. Ideally, this should happen at as early stage of the design process as possible, so that designers can(More)
Application models are often disregarded during the design of multiprocessor Systems-on-Chip (MPSoC). This is due to the difficulties of capturing the application constraints and applying them to the design space exploration of the platform. In this article we propose an application modelling formalism that supports joint validation of application and(More)
High-level abstraction modeling of NoC-based MPSoCs is an emerging approach to handle the vast design space alternatives of such systems. In this context, this work presents a model-based design flow, allowing the design space exploration of NoC-based MPSoCs at early stages of the design flow. The proposed flow supports accurate performance evaluation,(More)
  • 1