Sankar Gurumurthy

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We present an algorithm for the minimization of Büchi automata based on the notion of fair simulation introduced in [6]. Unlike direct simulation, fair simulation allows flexibility in the satisfaction of the acceptance conditions, and hence leads to larger relations. However, it is not always possible to remove edges to simulated states or merge(More)
Several optimal algorithms have been proposed for the complementation of nondeterministic Büchi word automata. Due to the intricacy of the problem and the exponential blow-up that complementation involves, these algorithms have never been used in practice, even though an effective complementation construction would be of significant practical value.(More)
Testing a processor in native mode by executing instructions from cache has been shown to be very effective in discovering defective chips. In previous work, we showed an efficient technique for generating instruction sequences targeting specific faults. We generated tests using traditional techniques at the module level and then mapped them to instruction(More)
We present a technique that deals with the problem of efficiently generating instruction sequences to test for delay defects in a processor. These instruction sequences are loaded into the cache of a processor and the processor is run in its normal functional (native) mode to test itself. The methodology that we present avoids the significant increase in(More)
With shrinking process technologies, small delay defects are becoming more prominent. Therefore, there is a need to test processors for such defects. However, structural tests for delay defects may lead to considerable yield loss. Moreover, prevalent fault models for delay defects are not efficient in terms of either representing the defects adequately or(More)
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