Sanjay K. Bose

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We develop a framework for optimal rate allocation and routing in multihop wireless networks. Each node in the network has delay-sensitive data to send to a unique destination and this data can be sent over a single (multihop) path through the network or via multiple paths. Sending over multiple paths can increase throughput and reduce congestion. Our goal(More)
We consider a slotted WDM packet switch with limited-range wavelength converters. The performance of this switch is studied using simulations with various types of data traffic. Results show that the slotted WDM packet switch with a small range of wavelength conversion capability can achieve a performance close to that of a switch with the full range of(More)
We evaluate the performance of optical network designs using relatively few switch nodes at which wavelength conversion and electronic regeneration is possible. A simple heuristic for placing the fewest such nodes to reach a given blocking probability is based on the ranked frequency of shortest-path routes transiting each node. This strategy is found to be(More)
In this paper we describe an approximate method for the analysis of an open network of finite capacity queues. Finite buffer capacities at the nodes introduce blocking of jobs that finish service at a node and find that the destination node is full at that time. When this happens, we assume that the blocked job is held at the server of the queue where it(More)
This paper considers the network protection technique of shared backup path protection (SBPP) in comparison with 1 + 1 path protection for elastic optical networks. We develop integer linear programming (ILP) models to minimize both the required spare capacity and the maximum number of link frequency slots (FSs) used. We consider transponder tunability that(More)
This paper develops both exact and approximate models for the analysis of an all-optical packet switch based on a fiber-loop buffer memory (FLBM). The switch structure and operation is based on the fully shared buffer architecture of the Research and Development in Advanced Communications in Europe—ATM Optical Switching (RACE-ATMOS) project [1], which uses(More)