Sanjay Dubey

Learn More
—The IBM POWER6 processor is a dual-core, 341 mm 2 , 790 million transistor chip fabricated using IBM's 65 nm partially-depleted SOI process. Capable of running at frequencies up to 5 GHz in high performance applications, it can also operate under 100 W for power-sensitive applications. Traditional power-intensive and deep-pipelining techniques used in high(More)
— Solar DC pump system is easy to install and operates full automatically without watching. Solar DC pump needs less solar panels to run than the AC pump. A simulation model is necessary for the manufacturer to assess the performance of solar pump controller. Solar DC Pump consists of solar PV Modules, solar DC controller, and submersible DC pump. Solar(More)
A Wallace tree multiplier using modified booth algorithm is proposed in this paper. It is an improved version of tree based Wallace tree multiplier [1] architecture. This paper aims at additional reduction of latency and power consumption of the Wallace tree multiplier. This is accomplished by the use of booth algorithm, 5:2, 4:2, and 3:2 compressor adders.(More)
  • Sandeep Mehra, Jaishree Dubey, Dola Bhowmik, Sanjay Dubey
  • 2013
Based on most of the literature, this paper reviewed the progress made in following aspects: cognition to cyanobacteria recruitment, various traps for studying cyanobacteria recruitment in lakes, recruitment patterns of some species of cyanobacteria and the driving factors for recruitment. Additionally, perspective studies of cyanobacteria recruitment in(More)
  • 1