Samuel Naffziger

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With the rising integration levels used to increase digital processing performance , there is a clear need for multiple independent on-chip supplies in order to support per-IP or block power management. Simply adding multiple off-chip DC-DC converters is not only difficult due to supply impedance concerns, but also adds cost to the platform by increasing(More)
AMD's 4+ GHz x86-64 core code-named " Piledriver " employs resonant clocking [1,2,3,4] to reduce clock distribution power up to 24% while maintaining a low clock-skew target. To support testability and robust operation at the wide range of operating frequencies required of a commercial processor, the clock system operates in two modes: direct-drive (cclk)(More)