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Universidade dé Evora's Integrated Information System (SIIUE) aims at representing the entire universe of concepts useful for the management and day-today operation of the Organization, as seen from the point of view of several different classes of users. It relies on ISCO, a logic programming language geared towards the development and maintenance of(More)
The current proposals for the inclusion of modules in the ISO Prolog standard are not very consensual. Since a program-structuring feature is required for a production programming language, several alternatives have been explored over the years. In this article we recall and expand on the concepts of Contextual Logic Programming, a powerful and simple(More)
In this article we present the University of Evora's Integrated Information System (SIIUE), which is meant to model most of the information necessary for the management and day-today operation of an institution such as a public University. SIIUE is centered around a logic-based representation of all intervenients and processes, which is used to generate the(More)
We present a parallel implementation of a constraint-based local search algorithm and investigate its performance results on hardware with several hundreds of processors. We choose as basic constraint solving algorithm for these experiments the " adaptive search " method, an efficient sequential local search method for Constraint Satisfaction Problems. The(More)
SUMMARY We investigated the use of the Cell Broadband Engine (Cell/BE) for constraint-based local search and combinatorial optimization applications. We presented a parallel version of a constraint-based local search algorithm that was chosen because it fits very well the Cell/BE architecture because it requires neither shared memory nor communication among(More)
—The Costas Array Problem is a highly combina-torial problem linked to radar applications. We present in this paper its detailed modeling and solving by Adaptive Search, a constraint-based local search method. Experiments have been done on both sequential and parallel hardware up to several hundreds of cores. Performance evaluation of the sequential version(More)