Salahuddin Raju

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MoS2 and other atomic-level thick layered materials have been shown to have a high potential for outperforming Si transistors at the scaling limit. In this work, we demonstrate a MoS2 transistor with a low voltage and high ON/OFF ratio. A record small equivalent oxide thickness of ∼1.1 nm has been obtained by using ultra high-k gate dielectric(More)
Carbon nanotubes (CNTs) and graphene are potential candidates for future interconnect materials. CNTs are promising on-chip via interconnect materials due to their readily formed vertical structures, their current-carrying capacity, which is much larger than existing on-chip interconnect materials such as copper and tungsten, and their demonstrated ability(More)
This paper discusses the safety requirements, equivalent circuit model, and design strategy of wireless power transmission to neural implants. The most daunting challenge is the design of the integrated receiving coil on the implantable device whose size must be within the safety and regulation limits while providing sufficient power transfer and(More)
The application of carbon-nanotube to reduce interconnect delay is studied in this work, with the emphasis on how it can be used to reduce the inter-metal capacitance. By forming vertically aligned cylindrical pores assisted by vertically grown CNT, mechanically stable ultra-low-k interlayer dielectric with k-value down to 1.89 is experimentally(More)
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