Saeed Chehrazi

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This article describes a fully integrated 90 nm CMOS software-defined radio receiver operating in the 800 MHz to 5 GHz band. Unlike the classical SDR paradigm, which digitizes the whole spectrum uniformly, this receiver acts as a signal conditioner for the analog-to-digital converters, emphasizing only the wanted channel. Thus, the ADCs operate with modest(More)
Noise in the mixer of zero-IF receivers can compromise the overall receiver sensitivity. The evolution of a passive CMOS mixer based on the knowledge of the physical mechanisms of noise in an active mixer is explained. Qualitative physical models that simply explain the frequency translation of both the flicker and white noise of different FETs in the mixer(More)
Performance of the first-order anti-aliasing integration sampler used in software-defined radio (SDR) receivers is analyzed versus all practical nonidealities. The nonidealities that are considered in this paper are transconductor finite output resistance, switch resistance, nonzero rise and fall times of the sampling clock, charge injection, clock jitter,(More)
Amplitude-modulation detection in the mixer plagues the performance of the zero-intermediate-frequency receiver by downconverting the envelope of amplitude modulated blockers to baseband where the desired channel is after downconversion. Simple equations based on physical mechanisms of second-order intermodulation generation have been derived which can(More)
A new architecture is presented for a sinc<sup>2</sup>(f) filter intended to sample channels of varying bandwidth when surrounded by blockers and adjacent bands. Sample rate is programmable from 5 to 40 MHz, and aliases are suppressed by 45 dB or more. The 0.13-mum CMOS circuit consumes 6mA from 1.2V
A new architecture is presented for a sinc<sup>2</sup>(f) filter intended to sample channels of varying bandwidth when surrounded by blockers and adjacent bands. The sample rate is programmable from 5 to 40 MHz, and aliases are suppressed by 45 dB or more. The noise and linearity performance of the filter is analyzed, and the effects of various(More)
A software-defined radio receiver is designed from a low power ADC perspective, exploiting programmability of windowed integration sampler and clock-programmable discrete-time analog filters. To cover the major frequency bands in today use a wideband RF front-end, including the low noise amplifier and a wide tuning-range synthesizer, spanning over 800 MHz-6(More)
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