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A fully integrated 40-Gb/s transmitter and receiver chipset with SFI-5 interface was implemented in a 65-nm CMOS technology and mounted in a plastic BGA package. The transmitter chip provides a good jitter performance with a 40-GHz full-rate clock architecture that alleviates pattern-dependent jitter. The measured RMS jitter on the output was 570 to 900 fs(More)
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