S. Kaxiras

Publications165
h-index29
Citations3,308
Highly Influential Citations248
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  • Publications
  • Influence
Cache decay: exploiting generational behavior to reduce cache leakage power
TLDR
This paper examines methods for reducing leakage power within the cache memories of the CPU. Expand
  • 738
  • 65
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Computer Architecture Techniques for Power-Efficiency
TLDR
In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Expand
  • 219
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TCP: tag correlating prefetchers
TLDR
We show that correlating prefetchers that work with tags instead of cache-line addresses are significantly more resource-efficient, providing equal or better performance than previous proposals. Expand
  • 88
  • 10
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Improving CC-NUMA performance using Instruction-based Prediction
TLDR
We propose Instruction-based Prediction as a means to optimize directory based cache coherent NUMA shared memory. Expand
  • 87
  • 9
  • PDF
Green governors: A framework for Continuously Adaptive DVFS
TLDR
We present Continuously Adaptive Dynamic Voltage/frequency scaling in Linux systems running on Intel i7 and AMD Phenom II processors. Expand
  • 121
  • 8
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Complexity-effective multicore coherence
TLDR
We show that a much simpler, directory-less/broadcast-less, multicore coherence can outperform a directory protocol but without its complexity and overhead. Expand
  • 99
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Introducing DVFS-Management in a Full-System Simulator
TLDR
We extend the gem5 simulator to support full-system DVFS modeling. Expand
  • 37
  • 7
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Efficient Invisible Speculative Execution through Selective Delay and Value Prediction
TLDR
Speculative execution, the base on which modern high-performance general-purpose CPUs are built on, has recently been shown to enable a slew of security attacks. Expand
  • 25
  • 7
  • PDF
Towards more efficient execution: a decoupled access-execute approach
TLDR
The end of Dennard scaling is expected to shrink the range of DVFS in future nodes, limiting the energy savings of this technique. Expand
  • 42
  • 7
  • PDF
Cache replacement based on reuse-distance prediction
TLDR
In this paper, we propose to directly predict reuse-distances via instruction-based (PC) prediction and use this information for cache level optimizations. Expand
  • 114
  • 6
  • PDF