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A priori wirelength and interconnect estimation based on circuit characteristics
TLDR
We propose a new a priori interconnect and wirelength estimation methodology for island style field programmable gate arrays (FPGAs). Expand
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A New Wirelength Model for Analytical Placement
TLDR
This paper proposes a new mathematical model to approximate the HPWL cost function that can be used in analytical placers. Expand
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Fast-SL: an efficient algorithm to identify synthetic lethal sets in metabolic networks
TLDR
We propose an algorithm, Fast-SL, which surmounts the computational complexity of previous approaches by iteratively reducing the search space for synthetic lethals, resulting in a substantial reduction in running time, even for higher order synthetic lethal. Expand
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A priori wirelength and interconnect estimation based on circuit characteristic
TLDR
We propose a new a priori interconnect and wirelength estimation methodology for island style field programmable gate arrays (FPGAs). Expand
  • 15
  • 2
Application behavior aware re-reference interval prediction for shared LLC
TLDR
In modern CMPs, Last Level Cache (LLC) is shared among cores for better utilization. Expand
  • 5
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CHOAMP: Cost Based Hardware Optimization for Asymmetric Multicore Processors
TLDR
Heterogeneous Multiprocessors (HMPs) are popular due to their energy efficiency over Symmetric Multicore Processors (SMPs). Expand
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An efficient wirelength model for analytical placement
TLDR
We present a new approximation scheme which uses a non-recursive approximation to the max function. Expand
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On metrics for comparing routability estimation methods for FPGAs
TLDR
We propose a uniform reporting metric based on comparing the estimates produced with the results of an actual detailed router on both local and global levels. Expand
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fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits
TLDR
We introduce a new methodology, fGREP, for ultra-fast estimation of routing demands for placed circuits on FPGAs. Expand
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A New Parallel Algorithm for Minimum Spanning Tree Problem
Minimum Spanning Tree (MST) is one of the well known classical graph problems. It has many applications in VLSI layout and routing, wireless communication and various other fields. In this paper, weExpand
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