S. Vijay Ram

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In digital VLSI, power dissipation has become a prime constraint. Many design architecture and techniques have been developed to reduce power dissipation. In this paper implementation of sequential circuits such as D flip flop, PIPO shift register and RAM in Gate diffusion input (GDI) technique and its comparison with other logic styles is presented. This(More)
In this work, we are considering the acknowledgement implosion problem at the intermediate routers in a reliable multicast scenario. In this kind of multicasting, the server expects all the clients to give acknowledgements. Thus when all the clients give acknowledgements the overhead on the server can increase. We are presenting a solution to this problem(More)
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