S. Veerakumar

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-This paper discuss about the new approach of parameters monitoring for drives through power line carrier communication. Using these technique parameters like speed, voltage, current and power factors are monitored by using exceed power leads as a communication media. The communication media are located in two different places for sending and receiving the(More)
A New architecture of Built-In SelfDiagnosis is presented in this project. The logic Built-InSelf-Test architecture method is extreme response compaction architecture. This architecture first time enables an autonomous on-chip evaluation of test responses with negligible hardware overhead. Architecture advantage is all data, which is relevant for a(More)
This work presents the application of genetic algorithm (GA) for the design of data communication networks. Genetic algorithms are being used extensively in optimization problems as an alternative to traditional methods. We explore the use of GAs for solving a special case of network design problem called the degree constrained minimum spanning tree problem(More)
In the present design algorithms, the speed of the multipliers is limited by the speed of the adders utilised. This work is dedicated for the design of a 16-bit multiplier which is proposed using a vedic sutra named Urdhva Tiryagbhyam from Vedic Mathematics. The 16-bit multiplier is realized using a 8-bit multiplier which inturn realized by a 4-bit(More)
The Three Phase Voltage Source Inverter supplies invariably required variable voltage and frequency of the adjustable speed drive system. A number of pulse width modulation (PWM) schemes are used to obtain variable voltage and frequency supply from an inverter. The most widely used PWM scheme for a Three Phase Voltage Source Inverter is carrier based(More)
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