S. V. A. R. Sastry

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This paper represents The algebraic soft-decoding (ASD) of Reed–Solomon (RS) codes provides significant coding gain over hard-decision decoding with polynomial complexity. The low-complexity chase (LCC) algorithm is proposed for reducing the complexity of interpolation, which interpolates over 2^n test vectors, being attractive for VLSI implementation. The(More)
  • Susrutha Babu Sukhavasi, Babu Suparshya, Satyanarayana P Sukhavasi, S R Sastry, Krishna Karthik, Arafath Ali +6 others
  • 2012
The algebraic soft-decoding (ASD) of Reed– Solomon (RS) codes provides significant coding gain over hard-decision decoding with polynomial complexity. The low-complexity chase (LCC) algorithm is proposed for reducing the complexity of interpolation, which interpolates over 2^n test vectors, being attractive for VLSI implementation. The interpolation is(More)
  • Suparshya Babu Sukhavasi, Susrutha Babu Sukhavasi, Vijaya Bhaskar, Madivada M Tech, S R Sastry, Kalavakolanu M Tech Student +2 others
  • 2012
In this paper a new approach of reducing power for a given system is developed that is self resetting logic, a parallel compressor is developed for multiplier by reducing its power with facilitation of this low power logic technique. By using this technique the power dissipation is significantly reduced with respect to other logics. By implementing the(More)
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