S. Rosenbaum

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Describes a monolithic NMOS coder/decoder (codec) with associated CCD transversal minimum phase filters which has been successfully implemented. The codec operates by charge redistribution in a binary-weighted capacitor array, with a resistor chain to define individual steps. The experimental performance compares well with PCM codecs implemented with(More)
A practical method has been developed to remove test fixture contributions from microwave measurements of transistors, monolithic microwave integrated circuits (MMICs), diodes, and other devices. The method uses a unique set of insertable calibration standards to locate the measurement plane within the microwave test fixture. No disassembly of the fixture,(More)
Design data and experimental characteristics are given on an 8192-bit n-channel charge-coupled memory device, intended for applications requiring shorter latency than ordinary MOS shift registers or fixed-head disks and at potentially lower cost than either MOS shift registers or random-access memories. This was achieved by dividing the array into 32 memory(More)
A 16384-bit charge-coupled device (CCD) memory has been developed for mass storage memory system application where moderate latency, high data rate and low system cost are required. The chip measures only 3.45/spl times/4.29 mm/SUP 2/ (136/spl times/169 mil/SUP 2/), fits a standard 16-pin package, and is organized as four separate shift registers of 4096(More)
A 16,384-bit charge-coupled device (CCD) memory has been developed for mass storage memory system application where moderate latency, high data rate and low system cost are required. The chip measures only 136 &#215; 169 mil<sup>2</sup>to fit a standard 16-pin package and is organized as four separate shift registers of 4096 bits. A condensed(More)
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