S. H. J. Bos

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Using discrete time process algebra witb relative timing, a model for tbe PC-bus is designed. The model oftbe PC-bus is divided in three parts: a model for tbe bus lines, a model for tbe master interfaces and a model for tbe slave interfaces. The model of tbe bus lines is based on a model for a wired-AND. For tbe models oftbe interfaces, tbe approach is to(More)
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