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In this paper, a 3.2Gb/s CML transmitter with 20:1 multiplexer was developed for integrating with 8/10B encoders in high speed network applications. Compared with the common 10:1 multiplexer, this 20:1 transmitter reduces the required operating frequency in routers or switches by half. A double phase source coupled logic based differential circuit is used(More)
A &#x201C;hybrid&#x201D; high-k/metal gate (HK/MG) integration scheme is proposed in this paper to accomplish HP (high performance) 28 nm CMOSFETs by integrating gate-first/gate-last (GF/GL) techniques for N/PFET, respectively. For NFET, remarkable mobility (95% of n<sup>+</sup>poly/SiON@1MV/cm) and low V<inf>TH</inf> (0.25 V) was achieved through optimized(More)
The trend towards finer geometries and higher density circuits has made CMOS technology, with its low power dissipation and high noise margin, increasingly attractive for state-of-the-art integrated circuits. CMOS can also be a high performance technology. A 16K bit Static RAM has been designed, built and tested in a 0.5um-gate direct-write E-Beam(More)
Nuclear magnetic (MR) resonance spectroscopy and imaging technique are powerful methods available for determining molecular structures and non-invasive 3D imaging. In the effort of developing a nanoMRI microsystem, the authors have designed, fabricated, assembled and did preliminary characterization of the nanoMRI probe. A multilayer high aspect ratio metal(More)
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