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Our physics-based HCD model has been validated using scaled CMOS transistors in our previous work. In this work we apply this model for the first time to a high-voltage nLDMOS device. For the calculation of the degrading behaviour the Boltzmann transport equation solver ViennaSHE is used which also requires high quality adaptive meshing. We discuss the(More)
Recent studies have clearly demonstrated that the degradation of MOS transistors due to hot carriers is highly sensitive to the energy distribution of the carriers. These distributions can only be obtained in sufficient detail by the simultaneous solution of the Boltzmann transport equation (BTE) for both carrier types. For predictive simulations, the(More)
We propose and verify a model for hot carrier degradation based on the exhaustive evaluation of the energy distribution function for charge carriers in the channel by means of a full-band Monte-Carlo device simulator. This approach allows us to capture the interplay between “hot” and “colder” electrons and their contribution to(More)
We present a thorough analysis of physics-based hot-carrier degradation (HCD) models. We discuss the main features of HCD such as its strong localization at the drain side of the device, the weakening of the degradation at higher temperatures, and the change of the worst-case condition in small devices. The first feature is related to “hot” carriers, while(More)
We discuss and analyze the main features of hot-carrier degradation (HCD) which are a strong localization at the drain-side of the device, the interplay between single- and multiple-particle processes of Si-H bond dissociation, the transition of the worst-case scenario when going from long- to short-channel devices, and its temperature dependence. These(More)
We analyze the impact of oxide thickness variations on hot-carrier degradation. For this purpose, we develop an analytical approximation of our hot-carrier degradation (HCD) model. As this approximation is derived from a physics-based model of HCD, it considers all the essential features of this detrimental phenomenon. Among them are the interplay between(More)
We present a detailed modeling study of charging and discharging traps in dielectrics used in modern semiconductor devices. Existing descriptions of charge trapping are often restricted to charge injection from the substrate and ignore the presence of the gate contact as a source/sink of charge carriers. This assumption loses its justification when the gate(More)
Hot-carrier degradation is associated with the buildup of defects at or near the silicon/silicon dioxide interfaced of a metal-oxide-semiconductor transistor. However, the exact location of the defects, as well as their temporal buildup during stress, is rarely studied. In this work we directly compare the experimental interface state density profiles(More)
Using our physics-based model for hot-carrier degradation (HCD) we analyze the role of such important processes as the Si-H bond-breakage induced by a solitary hot carrier, bond dissociation triggered by the miltivibrational excitation of the bond, and electron-electron scattering. To check the roles of these mechanisms we use planar CMOS devices with gate(More)
Using a physics-based model for hot-carrier degradation we analyze the worst-case conditions for long-channel transistors of two types: a relatively low voltage n-MOSFET and a high-voltage p-LDMOS. The key issue in the hot-carrier degradation model is the information about the carrier energetical distribution function which allows us to asses the carrier(More)