S. Djorić-Veljković

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Negative bias temperature instabilities in commercial IRF9520 p-channel power VDMOSFETs under both static and pulsed bias stress conditions were studied. The pulsed voltage stressing caused generally lower shifts as compared to static stressing performed at the same temperature with equal stress voltage magnitude, as a consequence of partial recovery during(More)
In this paper the electrical and trapping characteristics of multilayer HfO<inf>2</inf>/Al<inf>2</inf>O<inf>3</inf> dielectric stacks on silicon as a potential device for flash memory applications were investigated. Trapping phenomena have been studied by evaluating the memory window, i.e. the flat-band voltage shift of high frequency C-V curves after(More)
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