S. C. Prasad

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In this article we address the problem of optimization of VLSI circuits to minimize power consumption while meeting performance goals. We present a method of estimating power consumption of a basic or complex CMOS gate which takes the internal capacitances of the gate into account. This method is used to select an ordering of series-connected transistors(More)
We address the problem of long cycle time associated with the basic method of optimizing VLSI circuits. We are developing a system which makes it possible to carry out arbitrary changes to Register Transfer Level (RTL) source description of the circuit after a gate-level implementation has been synthesized. The system incrementally updates the gate-level(More)
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