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In this paper, we present an experimental current-mode Kohonen neural network (KNN) implemented in a CMOS 0.18 μm process. The network contains four output neurons. Each neuron has three analog weights related to three inputs. The presented KNN has been realized using building blocks proposed earlier by the authors, such as binary tree current-mode(More)
This paper presents a complementary metal-oxide-semiconductor (CMOS) implementation of a conscience mechanism used to improve the effectiveness of learning in the winner-takes-all (WTA) artificial neural networks (ANNs) realized at the transistor level. This mechanism makes it possible to eliminate the effect of the so-called ¿dead neurons,¿ which do not(More)
In this study, we present a hardware implementation of the conscience mechanism in Kohonen self-organizing maps. The proposed realization of the conscience mechanism is important to the functioning of the neural network as it eliminates so-called dead (inactive) neurons. As a result the network learning, the level quantization error can be reduced. The(More)
A simple analog circuit is presented which can play a neuron role in static-model-based neural networks implemented in the form of an integrated circuit. Operating in a transresistance mode it is suited to cooperate with transconductance synapses. As a result, its input signal is a current which is a sum of currents coming from the synapses. Summation of(More)
The paper deals with hardware implemented Kohonen neural networks capable of fast learning on silicon. An analog network for calculating Euclidean distance is presented. The circuit is well suited to be used in competitive learning using a WTA (Winner Takes All) as well as WTM (Winner Takes Most) methods, where the Euclidean distance can be applied as a(More)
In this paper, a problem of discovering numeric laws governing a trained neural network is considered. We propose new multilayer perceptrons implementing fractional rational functions, i.e. functions expressed as ratio of two polynomials of any order with a given number of components in the function numerator and denominator. Our networks can be utilized(More)
A new concept and CMOS implementation of an analog current-mode memory with increased retention time is presented. Because the memory is of a capacitive type, there are difficulties with long-term storing the written information, when its basic form is used. To overcome this problem, we propose applying a positive feedback which ensures obtaining the same(More)
This paper presents an application of an artificial neural network to determine survival time of patients with a bladder cancer. Different learning methods have been investigated to find a solution, which is most optimal from a computational complexity point of view. In our study, a model of a multilayer perceptron with a training algorithm based on an(More)
In this paper, possibilities and restrictions of analog signal processing in the context of its application to neural networks are presented. Factors influencing the processing effectiveness are outlined. Current-mode as well as voltage mode techniques are considered. Both techniques possess advantages and disadvantages but the number of situations where(More)