Ryoichi Yamaguchi

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A 120-GHz-band wireless link that uses millimeter-wave (MMW) photonic techniques was developed. The output power and noise characteristics of 120-GHz-band MMWs generated by converting a 125-GHz optical subcarrier signal were evaluated. It was then shown that the noise characteristics of the 125-GHz signal generated with these photonic technologies is(More)
We have developed a 120-GHz-band wireless link whose maximum transmission data rate is 11.1 Gbit/s. The wireless link uses millimeter-wave monolithic integrated circuits (MMICs) for the generation of a 120-GHz-band millimeter-wave wireless signal. The MMICs were fabricated using 0.1-mum-gate InP-HEMTs and coplanar waveguides. The wireless link can handle(More)
We measured the effects of rain attenuation on 120-GHz band wireless link during the heavy rainy period (from July to September, 2008) and annual period (from March to December, 2008). The heavy rainy period data are used as a basis for the wireless link design, and the annual data are used to calculate the reliability of the wireless link. The 120-GHz band(More)
This paper proposes a tool set for the design of asynchronous circuits with bundled-data implementation. Using the proposed tool set with commercial CAD tools, asynchronous circuits with bundled-data implementation can be designed easily. Through the experiments, this paper evaluates synthesized circuits using the proposed tool set in terms of area,(More)
Reconfigtirable logic devices are classified as the fine-grained or coarse-grained type on the basis of their basic logic cell architecture. In general, each architecture has its own merit; therefore, it is difficult to achieve a balance between the operation speed and implementation area in various applications. In this paper, we propose a Variable Grain(More)
Reconfigurable logic devices are usually classified on the basis of their basic logic cell architecture as fine-grained or coarse-grained. In general, each architecture is suitable on its own merit; therefore, it is difficult to achieve a balance between the operation speed and area-efficiency in applications. In order to solve this problem, we propose a(More)
Reconfigurable logic devices (RLDs) are classified as the fine-grained or coarse-grained type based on their basic logic cell architecture. In general, each architecture has its own advantage. Therefore, it is difficult to achieve a balance between the operation speed and implementation area in various applications. In the present paper, we propose a(More)
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