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- Mao Wang, Wenjin Luo, +12 authors M. H. Chi
- 2010 Symposium on VLSI Technology
- 2010

A new Cu<inf>x</inf>Si<inf>y</inf>O resistive memory, which is different from Cu-doped SiO<inf>2</inf> or CuxO binary oxide, is integrated successfully in standard logic technology for the firstâ€¦ (More)

- Xiaoyong Xue, Wenxiang Jian, +8 authors Jingang Wu
- IEEE Journal of Solid-State Circuits
- 2013

A 0.13 Âµm 8 Mb <formula formulatype="inline"><tex Notation="TeX">${\rm Cu}_{\rm x}{\rm Si}_{\rm y}{\rm O}$</tex></formula> resistive random access memory (ReRAM) test macro with <formulaâ€¦ (More)

- Ju Tian, Ryan Huang, +6 authors Mitsuko Watabe-Uchida
- Neuron
- 2016

Dopamine neurons encode the difference between actual and predicted reward, or reward prediction error (RPE). Although many models have been proposed to account for this computation, it has beenâ€¦ (More)

- Yali Song, Yang Meng, +7 authors Jingang Wu
- 2013 Symposium on VLSI Technology
- 2013

We propose and demonstrate a dynamic self-adaptive write method (DSWM) for the first time, which fixes the reliability problem that over-set or over-reset degrades ReRAM endurance and retention ofâ€¦ (More)

- Xiaoyong Xue, Wenxiang Jian, +8 authors Jingang Wu
- J. Solid-State Circuits
- 2013

- Yufeng Xie, Xiaoyong Xue, +4 authors Jingang Wu
- IEEE Transactions on Circuits and Systems IIâ€¦
- 2016

A 64-kB logic resistive random access memory (RRAM) chip for physically secure key storage is presented. The chip has security features of resisting fully invasive attacks such as deprocessing andâ€¦ (More)

- Xiaoyong Xue, Jianguo Yang, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu
- IEEE Transactions on Very Large Scale Integrationâ€¦
- 2016

Emerging nonvolatile memories (NVMs), such as MRAM, PRAM, and RRAM, have been widely investigated to replace SRAM as the configuration bits in field-programmable gate arrays (FPGAs) for high securityâ€¦ (More)

- Yanliang Wang, Lingming Yang, +6 authors Yinyin Lin
- 2011 3rd IEEE International Memory Workshop (IMW)
- 2011

NA

- Yang Meng, Xiaoyong Xue, +6 authors Jingang Wu
- 2014 Symposium on VLSI Technology (VLSIâ€¦
- 2014

We propose an asymmetric write algorithm of step-down set/step-up reset without verify for the first time. The demonstration is carried out on a 128Kb test macro of AlO<sub>x</sub>/WO<sub>x</sub>â€¦ (More)

- Xiaoyong Xue, Yarong Fu, +7 authors Jingang Wu
- IEEE Transactions on Circuits and Systems IIâ€¦
- 2017

Magnetoresistive random access memory (MRAM) suffers from low magnetoresistance ratio and serious variations in both low-resistance state <inline-formula><tex-mathâ€¦ (More)