Rudy J. van de Plassche

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An analog-to-digital converter incorporating a distributed track-and-hold preprocessing combined with folding and interpolation techniques has been designed in CMOS technology. The presented extension of the well known folding concept has resulted in a 75 MHz maximum full-scale input signal frequency. A signal-to-noise ratio of 44 dB is obtained for this(More)
This paper presents a sixth-order continuous-time bandpass sigma–delta modulator (SDM) for analog-to-digital conversion of intermediate-frequency signals. An important aspect in the design of this SDM is the stability analysis using the describing function method. Key to the analysis is the extension of the linear gain model for the sampled quantizer with a(More)
This paper describes a new model for the stability analysis of low-pass Sigma-Delta modulators (Σ∆Ms) using the describing function method. The transfer of a single-bit quantizer is represented by a global signal gain and a phase uncertainty. This phase uncertainty arises from the limited accuracy in time with which the quantizer can detect the(More)
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