The paper gives a brief view on the process of analysis and adapting formal description of the current version of the VHDL language , described by VHDL 1076-2002 standard. The work searches the possibility to build the effective syntax analyser of the entire language by using automatic tools for parsers generation.
This contribution presents reducing variant of the deep pushdown automata. Deep pushdown automata is a new generalization of the classical pushdown automata. Basic idea of the modification consists of allowing these automata to access more deeper parts of pushdown and reducing strings to non-input symbols in the pushdown. It works similarly to bottom-up… (More)