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In mammals, genome-wide chromatin maps and immunofluorescence studies show that broad domains of repressive histone modifications are present on pericentromeric and telomeric repeats and on the inactive X chromosome. However, only a few autosomal loci such as silent Hox gene clusters have been shown to lie in broad domains of repressive histone(More)
Imprinted macro non-protein-coding (nc) RNAs are cis-repressor transcripts that silence multiple genes in at least three imprinted gene clusters in the mouse genome. Similar macro or long ncRNAs are abundant in the mammalian genome. Here we present the full coding and non-coding transcriptome of two mouse tissues: differentiated ES cells and fetal head(More)
BACKGROUND AND PURPOSE A new simple visual rating scale can be used in magnetic resonance imaging (MRI) to grade the severity of white matter changes (WMC). The authors sought to study the interobserver variability and the validity of this visual rating scale against a computer-aided quantitative method in measuring WMC. METHODS The authors examined 220(More)
Self-aligned double patterning (SADP) has become a promising technique to push pattern resolution limit to sub-22nm technology node. Although SADP provides good overlay controllability, it encounters many challenges in physical design stages to obtain conflict-free layout decomposition. In this paper, we study the impact on placement by different standard(More)
It is predicted that CMOS technology will probably enter into 22 nm node around 2012. Scaling of CMOS logic technology from 32 to 22 nm node meets more critical issues and needs some significant changes of the technology, as well as integration of the advanced processes. This paper will review the key processing technologies which can be potentially(More)
A novel direct conversion receiver with low cost and low power is implemented in a 0.18 μm 1P6M standard CMOS process for a Mobile UHF RFID reader. A highly linear active mixer with low flicker noise and low noise active load is proposed. An efficient and low cost on-chip DC offset voltage canceling scheme is adopted with a high-input-impedance four-input(More)