Ronald Spilka

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In this paper an automatically generated VHDL-Code of a Delta-Sigma-Modulator for a digital design-flow is presented. For the verification of the design-flow, an example system - a digital 4<sup>th</sup>-order Delta-Sigma-Modulator - in a standard 0.35&#x00B5;m technology is manufactured. As a proof of concept the simulation is compared to the measurement(More)
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