Ronald P. Preston

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A new CMOS microprocessor, the Alpha 21164, reaches 1,200 mips/600 MFLOPS (peak performance). This new implementation of the Alpha architecture achieves SPECint92/SPECfp92 performance of 345/505 (estimated). At these performance levels, the Alpha 21164 has delivered the highest performance of any commercially available microprocessor in the world as of(More)
PURPOSE To review the current literature and generate recommendations on the role of newer technology in the management of the unanticipated difficult airway. METHODS A literature search using key words and filters of English language and English abstracted publications from 1990-96 contained in the Medline, Current Contents and Biological Abstracts(More)
Three generations of Alpha microprocessors have been designed using a proven custom design methodology. The performance of these microprocessors was optimized by focusing on high-frequency design. The Alpha instruction set architecture facilitates high clock speed, and the chip organization for each generation was carefully chosen to meet critical paths.(More)
n September 1994, Digital Equipment Corporation introduced the 21164 Alpha microprocessor. This processor exceedU ed the performance level o f existing Alpha microprocessors by over 50 percent and delivered exceptional Performance on computing-intensive applications such as large database manipulation, scientific and technical simulation, CAD, and powerful(More)
A 300-MHz, custom 64-bit VLSI, second-generation Alpha CPU chip has been developed. The chip was designed in a 0.5-um CMOS technology using four levels of metal. The die size is 16.5 mm by 18.1 mm, contains 9.3 million transistors, operates at 3.3 V, and supports 3.3-V/5.0-V interfaces. Power dissipation is 50 W. It contains an 8-KB instruction cache; an(More)
PURPOSE To report the management of a multigravida presenting with preeclampsia, HELLP syndrome and acute cortical blindness for Caesarean section. CLINICAL FEATURES A 39-yr-old woman, with three past uncomplicated pregnancies presented at 33 wk with acute cortical blindness. Based on clinical and laboratory assessment, a diagnosis of preeclampsia with(More)
Adverse fetal heart rate (FHR) changes suggestive of fetal hypoxia are seen in patients with normal term pregnancies after initiation of epidural block for labour analgesia. It was our hypothesis that, in some parturients, these changes were a consequence of concealed aortocaval compression resulting in decreased uterine blood flow. We expected that the(More)
The NVAX CPU chip is a 1.3 million transistor, VAX microprocessor designed in Digital's 0.75-micrometer CMOS-4 technology. It has a typical cycle time of 12 ns under worst-case operating conditions. The goal of the chip design team was to design a high-performance, robust, and reliable chip, within the constraints of a short schedule. Design strategies were(More)
Low-power design is becoming a crucial design objective for the chip design engineer due to the growing demand on portable application and the increasing difficulties in cooling and heat removal. In the integrated circuits power consumption is one of the challenges like area and speed . In this paper a novel technique is proposed to design an error detector(More)
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