Roger Peel

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— This paper reports on the creation of a new back-end for the authors' occam-to-FPGA compiler. The creation of Communicating Sequential Processes (CSP) models of compiler-generated logic circuits has thus recently been automated. These models are now being used to provide reference testing of the compiler as it undergoes further implementation and(More)
This paper reports on the progress made in developing techniques for the verification of an occam to FPGA compiler. The compiler converts occam 1 programs into logic circuits that are suitable for loading into field-programmable gate arrays (FPGAs). Several levels of abstraction of these circuits provide links to conventional hardware implementations.(More)
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